Google expands its chipset lineup with up to 80% better inference price performance

Google has added two specialized systems to its eighth-generation Tensor Processing Unit (TPU) lineup, targeting secure AI computing and workloads requiring massive memory capacity. The expansion gives Google four distinct TPU configurations in one generation, reflecting the growing demands of enterprise AI infrastructure.

The new systems, TPU 8tx and TPU 8i Max, address challenges emerging as businesses deploy autonomous AI agents. One prioritizes confidential computing for sensitive workloads, while the other targets models handling enormous amounts of contextual information.

Google says its TPU business now serves nearly 100 customers. These include AI research labs, financial trading firms, retailers and universities. Customers can also deploy TPUs directly inside their own data centers.

Two systems, two priorities

TPU 8tx targets organizations that process sensitive information or operate under strict regulatory requirements. Google has integrated hardware-level confidential computing into the system, protecting data and model weights during active processing.

Typically, processors must decrypt information before working with it. That creates potential exposure even when storage systems and network connections use encryption.

Today, we're expanding our eighth-generation TPU portfolio with two new systems built specifically for the agentic era — bringing our total to four distinct eighth-generation TPU systems launched in a single year.

TPU 8i Max was built for massive context windows and the highest… pic.twitter.com/Ljj622Z5zL

— Google (@Google) November 9, 2026

Google addresses this vulnerability through hardware-based isolation. TPU 8tx uses the same silicon as TPU 8t, paired with fifth-generation AMD EPYC CPU hosts. It also incorporates Google’s low-latency Boardfly networking technology.

The configuration delivers up to twice the latency reduction compared with TPU 8t, according to Google. Performance penalties from its additional security protections remain minimal.

Organizations can also fine-tune proprietary models using private datasets. They can distill larger models into smaller versions without transferring sensitive information between separate computing clusters.

TPU 8i Max tackles a different limitation: memory bandwidth. Large AI workloads increasingly require processors to access enormous amounts of information without waiting for data transfers.

Google combines two TPU 8i chips within a single package to address that bottleneck. The resulting system doubles compute capacity, on-chip SRAM, and high-bandwidth memory bandwidth.

It also fits twice the silicon within the existing rack footprint. That allows data centers to accommodate more computing capacity within the same physical space.

Four accelerators for AI

The expanded lineup now covers different stages of AI development and deployment. TPU 8t handles large-scale model training, while TPU 8i focuses on low-latency inference and reasoning.

TPU 8tx adds confidential computing capabilities. TPU 8i Max targets applications requiring extensive context windows and greater compute density.

Google originally introduced TPU 8t and TPU 8i at Cloud Next in April. The company reported up to 2.7 times better training performance for TPU 8t. TPU 8i offered up to 80 percent better inference price performance against the previous generation.

Making TPUs easier to use

Hardware improvements represent only part of Google’s broader strategy. The company is also trying to reduce the software expertise required to deploy workloads on its accelerators.

Its open-source TorchTPU project brings native PyTorch support to the platform. Developers can run existing PyTorch code and Hugging Face models without rewriting their applications.

Google has also introduced TPU development agents compatible with Claude Code, Cursor and Google Antigravity. These tools can automate onboarding, identify performance bottlenecks, and optimize custom kernels.

Another addition, TPU Sync, creates a unified memory architecture across TPU memory, host memory, and shared storage. Google says it can reduce key-value cache transfer latency and time to first token by more than 90 percent.

The company is also expanding its infrastructure management tools. Cloud Pathways and GKE dynamic slicing help developers coordinate large TPU clusters and reconfigure computing resources more efficiently.

Google’s broader bet is that AI infrastructure must evolve beyond faster individual processors. As autonomous agents handle increasingly complex tasks, memory, networking, and security will play equally important roles.